In the field of printed circuit boards, a patterned metal layer is formed on a printed circuit board to ensure electrical connection with semiconductor chip elements packaged on the printed circuit board, or, in the case of a multilayer printed circuit board, to electrically connect one layer with another.
With the recent demands for high-quality high circuit density products, a high circuit density and high-integrated metal circuitization layer is particularly desired. This can be accomplished by forming a patterned metal circuitization layer from a metal layer. Methods which have been used for formation of a metal circuitization layer can be generally classified into two types; a dry etching method using no solvent, and a wet etching method which is an electrochemical method using solvent. Whichever method is employed, prior to etching, a mask of an organic film, i.e., photoresist, or the like, is formed on a portion of the metal layer which is not intended to undergo etching.
In one dry etching method, etching, for example, sputter etching, is carried out by impinging the metal layer disposed on a substrate on which mask formation is already complete, with ions in a plasma atmosphere. This removes the portion of the metal layer where there is no mask. Specifically sputtered ions react with the exposed portion of the metal layer to form a compound having a low boiling point, that is, a high vapor pressure, to consequently remove the metal layer. Alternately, the physical force of sputter ions enables the removal of atoms from the metal surface. This method allows etching to have good anisotropy in the direction perpendicular to the substrate surface; therefore it can be suitably used for forming a high circuit density pattern metal circuitization layer. On the other hand, it has disadvantages in that this method has low throughput, high cost and a low etching rate.
In one wet etching method, etching is carried out by contacting a corrosive solvent with the masked metal layer to chemically etch the portion on which there is no mask. Generally copper is employed as a metal layer because of high electric conductivity and good metal plating properties, in which case cupric chloride, ferric chloride, hydrogen peroxide/sulfuric acid mixture and the like can be used as the solvent (etchant). Etchant must be such that it dissolves the metal layer exclusively, but not the mask which can be a metallic or organic resist. One way of contacting etchant with a metal layer is, for example, by first placing an object to be etched inside a tank where etching is to be carried out and then spraying the metal layer with etchant. In order to realize a uniform etching, it is necessary that etchant temperature and composition are appropriately controlled., and the shape of spray nozzle, the spray pressure and the etchant quantity are suitably adjusted and controlled.
Compared to dry etching, wet etching is more suitable for industrial production because it has a higher throughput, and it is employed for various manufacturing processes because it is low in cost. However wet etching is inferior in etching anisotropy in the direction perpendicular to the substrate surface. As a result, wet etching does not necessarily form a high density circuit pattern. The reason is that wet etching is a process of dissolving and removing a metal layer using the chemical action of the etchant. Thus wet etching does not always proceed in the direction perpendicular to the substrate surface. Specifically, wet etching may proceed in the direction parallel to the substrate surface, which causes a patterned metal circuitization layer to have a trapezoidal cross-section rather than a rectangular cross-section. When wet etching is employed as described above, in order to satisfy a specified circuit space it is necessary to increase the circuit space of the design specifications to allow for etching parallel to the plane of the substrate surface. As a result, high circuit density is difficult to achieve with wet etching techniques and circuit line width and spacing cannot be optimized.
Past attempts to solve the problem of etching parallel to the plane of the substrate surface have been unsuccessful. For example, as is shown in FIG. 1, etchant 10 is sprayed on a metal layer 2, which is formed on a substrate 1 and on whose surface a mask 3 is formed having a desired pattern. This causes etching to occur and proceed on a portion 5 which is not covered with the mask 3. This process is, a process where the concentration of metal ions, which are created by a reaction at an interface between the metal layer and etchant, (solid-liquid interface) increases as the reaction proceeds.
In the early stage of etching, while the concentration of metal ions is relatively low, etching will proceed in the direction substantially parallel to the force of spray 10. As is shown in FIG. 2, however, as the concentration of metal ions becomes higher at the solid-liquid interface during the process of etching, the corrosive action of the etchant gets reduced at the portion where concentration of metal ions is higher (the existence of metal ions is stylized and represented by a symbol .smallcircle. in the figures). As a result, etching proceeds in a lateral direction (right under the mask) and substantially parallel to the substrate surface where concentration of metal ions is lower. Such a phenomenon is termed side etch. If side etch proceeds in such a way, it may even act on a portion 6 which is not intended to be etched. FIG. 3 shows the shape of a section of the metal layer where etching is complete and the mask 3 is removed. As shown in FIG. 3, the occurrence of side etch causes the circuit layer to have a substantially trapezoid-shaped cross-section.
FIG. 4 shows a more preferred circuit layer having circuit lines with a substantially square shaped or rectangular shaped cross-section. A space 1 between circuit lines is standardized by design, and circuit lines must be formed to meet the standard, for example, the space 1=50 .mu.m or more at both the upper and bottom surfaces thereof. Referring to FIG. 3, it is apparent that when a cross-section of the circuit line becomes more rectangular or square-shaped, the circuit lines can meet the preferred condition where space 1 is designed to be 1.sub.0 (1=1.sub.0). On the other hand, in the circuit lines of which the cross-section becomes substantially trapezoid-shaped as shown in FIG. 3, even if their space is designed to have a prescribed value of 1.sub.0 and the mask is formed to leave a space of 1.sub.0, the actual space between circuit lines becomes less than 1.sub.0 (1.sub.1 &lt;1.sub.0) and the circuit line density cannot meet the standard. Consequently the circuit layers and the lines therein must be designed so that a space between circuit lines at the bottom of the circuit lines will become 1.sub.0. Referring to FIG. 3, again it is illustrated that side etching results in a less than optimal density metal circuitization layer because the space of the upper surfaces 12 must be designed to be greater than 1.sub.0 (1.sub.2 &gt;1.sub.0) to meet the circuit line spacing design standard. Accordingly it is very desirable to prevent side etch in the manufacturing of high density circuit layer printed circuit boards.
Various attempts have been made to solve the problem of side etch. For example, Published Unexamined Japanese Patent Application No. 63-153889 discloses a technique of preventing side etch.
According to the technique, a protective coat against side etching is formed on a circuit layer when it has been half etched, then etchant is side-sprayed right down on it to promote etching exclusively in the direction perpendicular to the circuit layer. This method attempts to realize etching in the direction perpendicular to a substrate solely by physical means of spray pressure. A similar technique is also disclosed in Published Unexamined Japanese Patent Application No. 4-66680. The patent application describes that side etch is prevented by spraying etchant on a circuit layer from a short distance and with a relatively high pressure in the early stage of etching. The methods which only use spray with a high pressure, however, are thought to have the following problems.
FIG. 5 is a stylized view showing possible problems of high pressure spraying. First, when spray 20 with a high pressure impacts a metal layer 2, a major portion of its flow takes a turn in the lateral direction and then hits the side of a mask 3 with a relatively high pressure. Consequently it causes deformation 21 in the mask layer, which may allow etching to proceed at some portion of metal layer 2 other than the desired portion. Further it may cause the mask layer to peel off. In addition a problem may also occur in the mask because spray 22 is directed at the surface of mask 3 for a long time. For example, the spray may cause minute pinholes on the surface of the mask, which may lead to the occurrence of etching at some portion of metal layer 2 other than the desired portion.
Other methods may be employed which allow etching to proceed in the direction substantially perpendicular to a substrate, in addition to utilizing physical force, as mentioned above, chemical means may be utilized. For example, Published Unexamined Japanese Patent Application No. 7-22383 discloses an etching method composed of two steps each of which employs etchant having a different composition. In particular, in a first step of the etching method, etchant having a relatively high etching rate is employed. After the etching reaches a prescribed stage, a second etchant of relatively low etching rate is employed. Compared with the method described above which uses spray pressure to cause etching to proceed in the direction substantially perpendicular to a substrate, this method is superior in preventing the occurrence of side etch and maintaining quality, but its drawback is that of a low etching rate.
Accordingly, the present invention makes use of a unique two-step etching process to solve the problem of low etching rate and results in circuit layers being etched into substantially square or rectangular circuit lines.